Team Hero — VENDOR.Energy

Core Team · Engineering Responsibility

Three engineers. Two co-inventors. One engineering system.

This page presents the engineering team behind VENDOR Energy — the people responsible for system architecture, power electronics, and FPGA-based control in VENDOR.Max (2.4–24 kW) and VENDOR.Zero (mW–50 W) autonomous power node development.

Team Definition · Engineering Accountability Anchor

The VENDOR engineering team consists of three engineers with complementary deep specializations in system-level architecture, industrial power electronics, and FPGA-based control logic. Two team members are co-inventors of the core patent family. The team operates close to intellectual property generation, control logic and safety system design, high-voltage and impulse electronics regimes, and long-cycle validation and TRL progression. All operational results are validated at TRL 5–6 with 1,000+ cumulative operational hours including extended continuous operation cycles.

Co-inventors of patent: WO2024209235 (PCT, 37 countries) · ES2950176 (granted, Spain)

TRL 5–6 1,000+ Operational Hours 6 Patent Jurisdictions Project Initiated 2014

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Team Philosophy — VENDOR.Energy

Engineering Accountability · How This Team Is Represented

Engineering Accountability Over Biography

In deep-tech energy systems operating near certification, IP governance, and high-voltage hardware boundaries, the correct representation of a team is not biography — it is functional accountability and demonstrable engineering output.

The Engineering Principle

We don’t present personalities.
We present accountability.

VENDOR operates at the intersection of high-voltage hardware, nonlinear control logic, and system-level intellectual property under active patent examination across six jurisdictions. In this context, functional accountability is the correct representation — not personal biography.

What This Means in Practice

Demonstrable output,
not narrative.

What matters at this stage is what has been built, how it has been validated, and what is being carried forward toward independent third-party verification. The people on this page are identified by engineering role, responsibility domain, and measurable contribution.

Engineering Domains · This Team Operates Within

High-voltage and impulse electronics Nonlinear electrodynamic operating regimes Intellectual property generation and governance Control logic and safety system design Long-cycle validation and TRL progression CE / UL certification pathway preparation

Team Members — VENDOR.Energy

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Vitaly Peretyachenko

Co-Founder & CEO

Systems Architecture · Infrastructure Strategy · Applied Engineering

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Engineering Background

Core Principle

Systems responsible for human safety must be deterministic, verifiable, and failure-aware.

Vitaly’s professional background spans medicine, IT infrastructure, and large-scale system engineering. Early work in intensive care and surgical environments established a foundational principle: a system at the boundary of human safety cannot tolerate non-deterministic behavior.

Alongside clinical practice, he developed early telemedicine tools and digital health systems, later transitioning into infrastructure-scale engineering and system orchestration. At VENDOR, this posture governs every architectural decision across the TRL 5→6 validation pathway.

Key Technical Competencies

System-level architecture framing and decomposition Validation logic and testability boundary definition Risk modeling and failure-mode thinking TRL progression governance (5→6→7→8) Long-term IP strategy and disclosure discipline Engineering–regulatory–economic integration

VENDOR Responsibility

Architectural coherence — ensuring every subsystem evolves toward a verifiable, certifiable, and scalable whole
Definition of validation logic and testability boundaries across all TRL stages
Long-term IP strategy — co-inventor of patent family WO2024209235 (PCT, 37 countries)
Integration of engineering, regulatory, and economic constraints into a unified architecture framework
Alignment of engineering milestones with investor-facing and certification timelines

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Oleg Krishevich

Co-Founder & CTO

Power Electronics · Control Systems · Industrial Architecture

LinkedIn —

Engineering Background

Core Principle

Power-stage instability translates directly into equipment loss. Control errors cannot be masked by software abstraction.

Oleg specializes in industrial power electronics and control systems for environments where failure tolerance is minimal and system behavior must remain predictable under load, stress, and long-term operation. His background includes design and deployment of power systems in continuous-duty and mission-critical applications — where electrical stability, thermal margins, and control reliability are primary engineering constraints.

Before VENDOR, Oleg worked on systems where power-stage instability directly translated into equipment loss, maintenance windows were strictly limited, and control logic had to remain transparent — not obscured by software layers that could mask physical failure. This discipline defines the VENDOR control architecture.

Key Technical Competencies

Power conversion systems — kW to MW-class installations Inverter and converter topologies for industrial loads Vector and scalar control for power stages Soft-start, direct-start, fault-tolerant operating modes Gate driver design — IGBT and thyristor-class devices Thermal management and lifetime-oriented component selection Protection subsystem and telemetry integration Multi-module scalability and load coordination

VENDOR Responsibility

Overall power-system architecture and electrical topology of the autonomous power node
Control logic governing pulse generation and operating regime formation
Safety interlocks, protection strategies, and fault-response sequences
Scalability design for multi-module configurations (2.4–24 kW range)
Alignment between physical electrodynamic behavior and control-layer assumptions

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Oleg Shnaider

System Architect

High-Speed Electronics · FPGA · Power Circuit Design

LinkedIn —

Engineering Background

Core Principle

Component tolerances directly affect system survival. Latency and jitter cannot be abstracted away.

Oleg is a system-level hardware architect specializing in high-speed electronics, FPGA-based control logic, and precision power circuitry. His engineering background is centered on systems operating near physical and electrical limits — where timing accuracy, signal integrity, and deterministic behavior are critical constraints, not optimization targets.

Before VENDOR, Oleg worked on industrial modules where component tolerances directly affected system survival, hardware behavior had to precisely match theoretical models under stress, and no software layer could compensate for hardware-level timing failures. This context is the foundation for his role in VENDOR’s control and synchronization architecture.

Key Technical Competencies

High-speed digital and mixed-signal circuit design FPGA-based control logic and real-time signal processing Precise timing coordination across multiple hardware domains Protection logic for fast transient events Power electronics circuit optimization — efficiency and stability Noise immunity, grounding strategies, EMC-aware design Multi-board system debugging and validation Hardware behavior validation under stress conditions

VENDOR Responsibility

Low-level hardware architecture of control and synchronization blocks
FPGA logic governing multi-module coordination and real-time regime monitoring
Precision timing and threshold handling in pulse-resonant operating regimes
Ensuring electrical behavior remains deterministic across all defined operating envelopes
Critical intersection of physics, electronics, and control theory — the layer where the regime is either maintained or lost

Team Posture — VENDOR.Energy

Engineering Posture · How This Team Operates

Built for Hard Problems

Stability Principle

Stability under uncertainty

The engineering target is deterministic behavior under real load, thermal variation, and operating envelope stress — not just under controlled laboratory conditions.

Failure Posture

Failure modes assumed before they appear

Every subsystem is designed against its own failure — not discovered after the fact. This posture originates from environments where failure during operation is not a recoverable event.

Validation Standard

Behavior validated, not narratives

Operational hours, regime stability data, and independent third-party review define what has been achieved. Unmeasured claims carry no weight in architecture decisions.

Safety Architecture

Safety as a first-class requirement

Certification constraints and safety boundaries are built into architecture from the earliest design decisions — not retrofitted before submission.

Current Measurable Result

1,000+ operational hours — including extended continuous operation cycles — is the current measurable answer to whether this team can carry the technology forward at TRL 5–6. The ongoing pathway toward DNV/TÜV independent verification is the next milestone.

Read the Engineering Manifesto

Team CTA — VENDOR.Energy

Evaluation and Partnership · Three Paths